1. Field of the Invention
The present invention relates to a method for driving a plasma display panel and the structure thereof and more particularly to a method for driving a plasma display panel of the pulse memory system and the structure thereof.
2. Description of the Prior Art
A plasma display panel (PDP) with a color display has recently been desired in place of a color CRT, which is used as a display device for office automation equipment such as a personal computer, drastically thinner. However, the color display of the DC plasma display panel tends to have a low luminance. This is because every color is indicated by exciting a fluorescent material using a gas to emit ultraviolet rays such as xenon as a discharge gas, thereby reducing the performance of conversion into visible light. The pulse memory system has been known as an art to solve the problem (for example, as described in The Institute of Television Engineers of Japan Technical Report, Vol. 9, No. 13, pages 13-18. The system will be described as follows:
As shown in FIG. 10, a panel includes two kinds of a plurality of display matrix electrodes: A plurality of cathodes 31 consisting of cathodes K.sub.1, K.sub.2, K.sub.3, . . . , etc. and a plurality of display anodes 32 consisting of display anodes A.sub.1, A.sub.2, A.sub.3, . . . , etc. which are perpendicular to the cathodes. The panel further has a plurality of sub anodes 33 consisting of sub anodes S.sub.1, S.sub.2, S.sub.3, . . . , etc. In addition, the panel also has a glass plate 41 on the outside of the display anodes 32 and a backboard 42 on the outside of the cathodes 31. A fluorescent material 43 is mounted on the glass plate 41. Each of the cathodes 31 and the anodes 32 are separated by walls 44 with a predetermined interval therebetween, thereby providing spaces 45 and 46 acting as a display discharge cell and a sub discharge cell, respectively. Most of the walls 44 have spaces between the glass plate 41 above the walls, thereby forming priming paths 47. The priming path 47 introduces the sub discharge occurring at the sub discharge cell 46 to the display discharge cell 45.
Referring to FIG. 11, a method for driving the pulse memory system will now be described. Keeping pulses V.sub.a are always applied to the display anodes 32 (A.sub.1, A.sub.2, A.sub.3, . . . , etc.) and scanning pulses V.sub.k with negative potential are successively applied to the cathodes 31 from a negative electrode K.sub.1. A fixed positive potential V.sub.s is applied to each of the sub anodes 33.
Sub discharge is always scanned at the sub discharge cell 46. The voltage V.sub.s -V.sub.k is settled to be more than the ignition voltage of the sub discharge cell 46, resulting in the discharge of the sub discharge cell 46 every time scanning pulses are applied. These discharges successively shift to the adjacent sub discharge cells. Charged particles are produced in the sub discharge cell 46 by the sub discharge. These charged particles are diffused into the display discharge cells 45 adjacent to the sub discharge cell 46 through the priming paths 47, thereby reducing the delayed time of the ignition in the display discharge cell 45.
A pulse discharge occurs, for example, in the display discharge cell 45, which is an intersection of a display anode A.sub.2 and a cathode K.sub.2, when a writing pulse V.sub.w is being applied to a display anode A.sub.2 while a scanning pulse is applied to a cathode K.sub.2 as shown in FIG. 11. Thus the ignition voltage of the display discharge cell 45 having received a writing pulse is reduced. The display discharge cell 45 is further discharged and flashes every time a keeping pulse V.sub.a is applied until an erasing pulse V.sub.E is applied. The voltage of the erasing pulse V.sub.E is settled to make the voltage between the cathode and the display anode less than the ignition voltage. Therefore, discharge is stopped after the application of the erasing pulse.
When a writing pulse is not applied, or after discharge is stopped by the application of an erasing pulse, the ignition voltage of the display discharge cell is kept to be high, thereby preventing discharge and luminance by a keeping pulse.
In the PDP of the pulse memory system, pulse emissions repeating between the application of a writing pulse and an erasing pulse are utilized for displaying. Thus such a device has a high luminance efficient for practical use, which is reported as about 100 cd/m.sup.2. It is possible to produce a panel with a cell pitch of about 0.6 mm.
FIG. 12 shows an example in which cathodes of the PDP of the pulse memory system are driven by IC's. A plurality of cathodes 11 are disposed perpendicular to a plurality of anodes 12. A discharge cell 6 is formed on a portion corresponding to the intersection of each of the cathodes 11 and the anodes 12. A sub anode is not shown in the drawing. A plurality of IC's 22 activate the cathodes 11. This is an example in which some of the adjacent plural cathodes are driven by one IC. As described above, the adjacent discharge cells having one anode in common sometimes discharge and flash at the same time. At this time, a current is flowing through the adjacent cathodes at the same time.
In order to produce the above PDP in a size of 10 to 15 inches, which is generally used for a personal computer and the like, a cell pitch needs to be less than 0.3 mm. However, according to the prior art, a cell pitch of about 0.3 mm leads to an inferior aperture ratio and insufficient area of the fluorescent material since the display discharge cell 45 is surrounded with the walls 44. Moreover, the discharge is not steady due to the drastically narrowed discharge space. Therefore, a practical luminance can not be obtained.
Additionally, mercury, used as a filler gas, is prevented from diffusing throughout all cells uniformly by the walls 44 as mercury is too heavy. Therefore, the density of mercury is kept low in the cell, where mercury fails to function to prevent the sputtering. Accordingly, partially reduced luminance and discoloration are caused, and in an extreme case, the lifetime of the panel is shortened.
Moreover, in the PDP driven in the conventional pulse memory system, the cathodes are driven by a plurality of IC's 22 as shown in FIG. 12, thereby allowing a current to flow through a plurality of cathodes connected to one IC at the same time when the panel is switched on. Therefore, the IC needs to have a large current capacity, resulting in a difficulty in integrating the drive circuits of the cathodes.
The present invention relates to a plasma display panel and the driving method thereof to solve the above problems. According to the device and the method, the number of the walls parallel to the cathodes is reduced, thereby increasing the aperture ratio. In addition, a high luminance is obtained in a panel with a small cell pitch required for office automation equipment. Furthermore, according to the present invention, mercury is easy to diffuse, thereby increasing the effect to prevent sputtering of the cathodes and further increasing the lifetime of the panel. When the cathodes are driven by the IC's, a current flowing through one IC at the same time is reduced, and the required current capacity of the IC is also reduced. Thus the drive circuit of the cathode can easily be integrated.